# Symbol definition of TDC GP2 (QFN32_5 footprint) for gschem/gEDA
# S. Salewski, 24-AUG-2008
# File: TDC-GP2-2.txt
# The Python script "tragesym" is used to convert this textual symbol definition to a symbol
# usage: tragesym TDC-GP2-2.txt TDC-GP2-2.sym

# tragesym options

[options]
# wordswap swaps labels if the pin is on the right side and looks like this:
#   "PB1 (CLK)". That's useful for micro controller port labels
# rotate_labels rotates the pintext of top and bottom pins
#   this is useful for large symbols like FPGAs with more than 100 pins
# sort_labels will sort the pins by it's labels
#   useful for address ports, busses, ...
wordswap=no
rotate_labels=no
sort_labels=no
generate_pinseq=yes
sym_width=3000
pinwidthvertical=300
pinwidthhorizontal=400

[geda_attr]
# name will be printed in the top of the symbol
# if you have a device with slots, you'll have to use slot= and slotdef=
# use comment= if there are special information you want to add
version=20060113 1
name=TDC-GP2
device=TDC-GP2
refdes=U?
footprint=QFN32_5
description=TDC-GP2 Time to Digital Converter
documentation=http://www.acam.de/fileadmin/Download/pdf/English/DB_GP2_e.pdf
author=Stefan Salewski
dist-license=GPL
use-license=unlimited
numslots=0
#slot=1
#slotdef=1:
#slotdef=2:
#slotdef=3:
#slotdef=4:
comment=generated with Python script tragesym

[pins]
# tabseparated list of pin descriptions
# ----------------------------------------
# pinnr is the physical number of the pin
# seq is the pinseq= attribute, leave it blank if it doesn't matter
# type can be (in, out, io, oc, oe, pas, tp, tri, clk, pwr)
# style can be (line,dot,clk,dotclk,none). none if only want to add a net
# posit. can be (l,r,t,b) or empty for nets
# net specifies the name of the net. Vcc or GND for example.
# label represents the pinlabel.
#	negation lines can be added with "\_" example: \_enable\_ 
#	if you want to write a "\" use "\\" as escape sequence
#-----------------------------------------------------
#pinnr	seq	type	style	posit.	net	label	
#-----------------------------------------------------
1		in	line	r		Xin
2		out	line	r		Xout
3		pwr	line	b		Vio
4		pwr	line	b		GND
5		out	line	l		Fire1
6		out	line	l		Fire2
7		in	line	l		Fire_In		
8		out	line	r		INTN
9		in	line	r		SSN
10		in	line	r		SCK
11		in	line	r		SI
12		out	line	r		SO
13		in	line	r		RSTN
14		pwr	line	b		Vcc
15		out	line	r		Clk32Out
16		in	line	r		Clk32In
24		in	line	l		PT1
23		in	line	l		PT2
22		pwr	line	b		Vio
21		pwr	line	b		GND
20		in	line	l		PT3
19		in	line	l		PT4
18		out	line	l		LoadT		
17		in	line	l		SenseT
32		in	line	l		En_Start
31		in	line	l		Start
30		in	line	l		Stop1
29		pwr	line	b		Vcc
28		pwr	line	b		GND
27		in	line	l		Stop2
26		in	line	l		En_Stop1
25		in	line	l		En_Stop2

